Groq Patents – Key Insights and Stats

Groq Inc. was founded in 2016 by Jonathan Ross and is doing business in designing radically simple elegant processor architecture technology to accelerate complex workloads in artificial intelligence, machine learning, and high-performance computing. As of October 2021, Groq has a market valuation of more than $1 Billion.

Groq has a total of 63 patents globally, out of which 21 have been granted. Of these 63 patents more than 98% patents are active. USA is where Groq has filed maximum number of patents followed by Taiwan and Europe and it also seems reasonable as the biggest market for Groq is USA, it has generated annual revenue of $41.8 million in the year 2020. Parallelly, USA seems to be the main focused R&D center and is also the origin country of Groq.

Do read about some of the most popular patents of Groq which have been covered by us in this article and also you can find Groq’s patents information, the worldwide patent filing activity and its patent filing trend over the years, and many other stats over Groq’s patent portfolio.

How many patents does Groq have?

Groq has a total of 63 patents globally. These patents belong to 23 unique patent families. Out of 63 patents, 62 patents are active.

How many Groq patents are Alive/Dead?

Worldwide Patents

Groq Worldwide Legal Trends

Patent Families

Groq Patent Portfolio

How Many Patents did Groq File Every Year?

Groq Patent Filing Trend

Are you wondering why there is a drop in patent filing for the last two years? It is because a patent application can take up to 18 months to get published. Certainly, it doesn’t suggest a decrease in the patent filing.

Years of Patent Filing or GrantGroq Application FiledGroq Patents Granted
2021123
20201233
2019355
2018142
20171

How Many Patents did Groq File in Different Countries?

Groq Patent Portfolio Worldwide

Countries in which Groq Filed Patents

CountryPatents
United States Of America28
Taiwan13
Europe4
China3
Korea (South)3
Japan1

Where are Research Centers of Groq Patents Located?

Groq R&D Centers

10 Best Groq Patents

US20180232663A1 is the most popular patent in the Groq portfolio. It has received 10 citations so far from companies like Amazon Technologies, Adobe Inc. and Nvidia Corporation.

Publication NumberCitation Count
US20180232663A110
US20200160226A14
US10516383B12
US10908900B11
TW202034191A1
US20190332467A11
WO2018132444A11
US11115147B20
US11114138B20
US11042360B10

What Percentage of Groq US Patent Applications were Granted?

Groq (Excluding its subsidiaries) has filed 25 patent applications at USPTO so far (Excluding Design and PCT applications). Out of these 14 have been granted leading to a grant rate of 100%.

Which Law Firms Filed Most US Patents for Groq?

Law FirmTotal ApplicationSuccess Rate
Groq Fenwick19100.00%
Fenwick & West Llp6100.00%

“Compute’s next breakthrough will be powered by a new, simplified architectural approach to hardware and software.”

Building the computer that will power the next generation of high-performance machine learning applications. Groq hardware is engineered to be high-performing and responsive. At batch size 1, Groq’s new streamlined architecture delivers remarkable performance. Groq hardware responds faster, whether you have one image or a million.

Groq’s technology delivers lightning-fast computation while using half the energy of the nearest competition, lowering total cost of ownership and lowering carbon impact. Groq hardware has the fastest ResNet-50 performance of any commercially available hardware.

List of Groq Patents

Publication NumberTitle (English)
US11115147B2Multichip fault management
US11114138B2Data structures with multiple read ports
US11042360B1Multiplier circuitry for multiplying operands of multiple data types
TWI729939BMethod and processor for decompression of model parameters using functions based upon cumulative count distributions
US10965957B1Multi-pass compression of uncompressed data
US10938412B2Decompression of model parameters using functions based upon cumulative count distributions
TWI719433BData structures with multiple read ports, processor, and method for data structures with multiple read ports
US10908900B1Efficient mapping of input data to vectors for a predictive model
US10884485B2Power optimization in an artificial intelligence processor
US10853037B1Digital circuit with compressed carry
TWI709910BProcessors and methods of processing data
US10831445B1Multimodal digital multiplication circuits and methods
US10824188B2Multichip timing synchronization circuits and methods
TWI708196BMethod and processor for decompression of model parameters using functions based upon cumulative count distributions
US10778196B2Reducing power consumption in a processor circuit
US10776078B1Multimodal multiplier systems and methods
US10754621B2Tiled switch matrix data permutation circuit
US10725741B2Digital circuit with compressed carry
US10680644B2Decompression of model parameters using functions based upon cumulative count distributions
US10516383B1Reducing power consumption in a processor circuit
US10448054B2Multi-pass compression of uncompressed data
CN113302595AMulti-chip timing synchronous circuit and method
TW202129518ALoading operands and outputting results from a multi-dimensional array using only a single side
EP3844884A1Tiled switch matrix data permutation circuit
EP3841670A1Reducing power consumption in a processor circuit
EP3841461A1Digital circuit with compressed carry
CN113039541ASpace partial transformation of matrix
US20210195244A1Multi-pass compression of uncompressed data
KR2021066863ASpatial Place Transformation of Matrices
WO2021108559A1Loading operands and outputting results from a multi-dimensional array using only a single side
US20210157767A1Loading operands and outputting results from a multi-dimensional array using only a single side
TW202117538AData structures with multiple read ports, processor, and method for data structures with multiple read ports
KR2021037726AReduced power consumption in the processor circuit
US20210081019A1Power optimization in an artificial intelligence processor
US20210004043A1Multichip Timing Synchronization Circuits and Methods
TW202046103AMultichip timing synchronization circuits and methods
US20200348911A1Tiled switch matrix data permutation circuit
WO2020185239A1Data structures with multiple read ports
WO2020185238A1Decompression of model parameters using functions based upon cumulative count distributions
TW202034191ASpatial locality transform of matrices
TW202034190ASpatial locality transform of matrices
TW202034189ASpatial locality transform of matrices
TW202034188ASpatial locality transform of matrices
EP3568749A4Error correction in computation
WO2020150068A1Multichip timing synchronization circuits and methods
WO2020146153A1Multichip fault management
WO2020123541A1Power optimization in an artificial intelligence processor
TW202020654ADigital circuit with compressed carry
WO2020106781A1Spatial locality transform of matrices
US20200160226A1Spatial locality transform of matrices
US20200159815A1Spatial locality transform of matrices
US20200159814A1Spatial locality transform of matrices
US20200159813A1Spatial locality transform of matrices
TW202018501ATiled switch matrix data permutation circuit
JP2020512712A
WO2020060885A1Digital circuit with compressed carry
WO2020047093A1Tiled switch matrix data permutation circuit
WO2020041362A1Reducing power consumption in a processor circuit
US20190332467A1Error Correction in Computation
CN110291501AIn the calculation of error correction
KR2019104192AError correction method in operation
US20180232663A1Minimizing memory and processor consumption in creating machine learning models
WO2018132444A1Error correction in computation
Updated on December 3, 2021

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